The present invention relates to a method of forming a dual damascene pattern of a semiconductor device and, more particularly, to a method of forming a dual damascene pattern of a semiconductor device, which can effectively remove horns existing at the boundary portions of a contact hole and a trench constituting the dual damascene pattern.
With the high integration of semiconductor devices, an alignment margin of a contact plug and an upper structure (for example, a line or contact pad) becomes short. Accordingly, a dual damascene process that is able to form the contact plug and the upper structure at the same time has been applied.
The dual damascene process includes several methods. One of the methods is described below as an example. First, a contact hole is formed by etching an inter-metal dielectric layer using a mask for the contact hole. The inside of the contact hole is gap-filled with a passivation layer. An insulating layer and the passivation layer are etched using a mask to form a trench connected to the contact hole. The passivation layer remaining within the contact hole is removed. Thus, a dual damascene pattern comprised of the contact hole and the trench is formed. A cleaning process is performed and the dual damascene pattern is gap-filled with a conductive material. Accordingly, a contact plug is formed in the contact hole, and a line or contact pad is formed in the trench.
However, during the etch process of forming the trench, the trench is etched while a polymer layer is formed around the contact hole. Therefore, a greater amount of the inter-metal dielectric layer remains at the entrance of the contact hole than at other portions, causing a horn shape (refer to 100 of FIG. 1). The horn shape is bent in a cleaning process. As a result, the bent horn shape may become a particle source.